All instructionsx86-64Memory

LEA

Compute an effective address

Calculate an address expression and write the result to a general-purpose register.

x86-64

Instruction forms

2 in this sample
FormBitsRequiresEncoding
LEA r32_dst, [base64 + index64*scale + disp]32x86-648D /r
LEA r64_dst, [base64 + index64*scale + disp]64x86-64REX.W + 8D /r
64 bits

Operation

Pseudo-C · selected form
dst = base + index * scale + displacement
// no memory read; flags unchanged

Simplified pseudocode for the selected form.

Exact upstream semantics

Standard variant

Source: intel/LEA-Load-Effective-Address.xml/0

let result := effective_address[0 +: operand_size];

Parameterized by register and element size; from the pinned upstream definition.

What to watch for

  • Square brackets describe an address calculation here, not a memory load.
  • The sample uses a 64-bit address size, with 32-bit or 64-bit destination size.

Architectural details

Flags
Arithmetic flags unchanged.
Destination
Writes the destination register.
Encoding
REX.W + 8D /r
Operands
  • r64_dstwrite · 64 bits
  • [base64 + index64*scale + disp]address expression · 64 bits
Coverage
Selected 32/64-bit register forms; 64-bit execution mode. LEA uses a 64-bit address size. Other operand and encoding forms are outside this sample.
Exception information & execution requirements
  • #UD

No memory is accessed by this selected form. Consult the source for execution-mode and prefix exceptions.

Feature availability alone does not guarantee execution: OS state and execution-level controls also apply. Use the linked architecture documentation for the full exception conditions.

Performance measurements are not included in this preview. Latency and throughput depend on the exact form and microarchitecture. Measured data on uops.info ↗

Sources & provenance

Technical fields are imported from pinned upstream files. Explanations and explorer behavior are maintained separately.

Intel · LEA-Load-Effective-Address.xml
Revision
4ebe7f0ac1bd00f46244c49bb72c503ce368def7
SHA-256
90f77eca39ea8db02b76fa0387711eee201d3a589cb11929f6bc98d1b642c9b6
Terms
Intel SDM terms; see License.md
View pinned upstream file ↗

Intel sources are a documentation preview. Arm ACLE mappings are adapted under CC BY-SA 4.0 with an additional patent license. Arm MRS encoding data is distributed under BSD-3-Clause. © Arm Limited and contributors. Coverage and attribution.